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Hyungcheol C Shin

from Cupertino, CA

Hyungcheol Shin Phones & Addresses

  • Cupertino, CA
  • San Jose, CA
  • Chandler, AZ
  • Gilbert, AZ
  • Berkeley, CA

Us Patents

  • Reduced Stress Isolation For Soi Devices And A Method For Fabricating

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  • US Patent:
    6627511, Sep 30, 2003
  • Filed:
    Jul 28, 1995
  • Appl. No.:
    08/508874
  • Inventors:
    Marco Racanelli - Phoenix AZ
    Hyungcheol Shin - Gilbert AZ
    Heemyong Park - Gilbert AZ
  • Assignee:
    Motorola, Inc. - Schaumburg IL
  • International Classification:
    H01L 2176
  • US Classification:
    438404, 438410, 438405, 438439
  • Abstract:
    A method for forming an isolation structure ( ) on a SOI substrate ( ) is provided. A three layer stack of an etchant barrier layer ( ), a stress relief layer ( ), and an oxide mask layer ( ) is formed on the SOI substrate ( ). The three layer stack is patterned and etched to expose portions of the etchant barrier layer ( ). The silicon layer ( ) below the exposed portions of the etchant barrier layer ( ) is oxidized to form the isolation structure ( ). The isolation structure ( ) comprises a birds head region ( ) with a small encroachment which results in higher edge threshold voltage. The method requires minimum over-oxidation and provides for an isolation structure ( ) that leaves the SOI substrate ( ) planar. Minimal over-oxidation reduces the number of dislocations formed during the oxidation process and improves the source to drain leakage of the device.
  • Semiconductor-On-Insulator Device Having A Laterally-Graded Channel Region And Method Of Making

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  • US Patent:
    56703899, Sep 23, 1997
  • Filed:
    Jan 11, 1996
  • Appl. No.:
    8/585137
  • Inventors:
    Wen-Ling Margaret Huang - Phoenix AZ
    Hyungcheol Shin - Gilbert AZ
    Marco Racanelli - Phoenix AZ
  • Assignee:
    Motorola, Inc. - Schaumburg IL
  • International Classification:
    H01L 21265
    H01L 2184
  • US Classification:
    437 21
  • Abstract:
    A silicon-on-insulator semiconductor device (40) having laterally-graded channel regions (23A, 24A) and a method of making the silicon-on-insulator semiconductor device (40). The silicon-on-insulator semiconductor device (40) has a gate structure (16) having sidewalls (19, 21) on a semiconductor layer (12). Lightly doped regions (26A, 27A) extend through an entire thickness of a portion of the semiconductor layer (12) under the sidewalls (19, 21). A laterally-graded channel region (23A) is formed below the gate structure (16) and abutting one (26A) of the lightly doped regions. A source (33) is formed in a first (26A) of the lightly doped regions and a drain region (34) is formed in a second (27A) of the lightly doped regions.

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Youtube

DRAMAS COREANOS PARTE 5

Did We Really Love? (True to Love or Have We Really Loved?/ )1999 Re...

  • Category:
    Film & Animation
  • Uploaded:
    16 Feb, 2011
  • Duration:
    3m 59s

WELA Korean Students

The Korean Students on a funny Fashion Show: Starring: 1. Lee Gwang Ju...

  • Category:
    Education
  • Uploaded:
    15 Jan, 2008
  • Duration:
    4m 48s

2008 Ttukseom Cup (G3) (2008.04.13, 7f)

1) 14.Namchonuijijo... (Concept Win-Intriga, Lord At Law) 2) 9.Baekgw...

  • Category:
    Sports
  • Uploaded:
    13 Apr, 2008
  • Duration:
    1m 53s

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