Abstract:
A sense amplifier for detecting the voltage state (high or low) of the bit line of a programmable logic device with improved switching speed when the voltage state changes. When the bit line is high, a pull-up circuit including a cascode limits the maximum bit line voltage while isolating the output node from a supply of positive potential. At the same time, a transistor turned on by the high bit line voltage connects the output node to ground. An inverting amplifier on the output node produces an amplified output that follows the bit line. When the bit line is low, the conductance of a transistor gated by the bit line is substantially reduced, resulting in a relatively small conductance between the source line and ground, so that the source line potential rises significantly. The relatively large conductance between the bit line and source line as compared to the relatively small conductance between the source line and ground causes the potentials on the bit line and source line to approach one another and stabilize at a potential significantly above ground potential, so that the minimum voltage level on the bit line is also limited. The voltage on the bit line in the low state is too low to activate the transistors that connect the output node to ground, but it does activate a transistor that connects the output node to the supply of positive potential, pulling the output node high and the inverted amplified output low.