Robert J Dawson

Author:

Robert O Dawson

ISBN #:

0882772430

Author:

Robert O Dawson

ISBN #:

0882773399

Author:

Robert O Dawson

ISBN #:

0882773402

Author:

Robert O Dawson

ISBN #:

0882778811

Author:

Robert L. Dawson

ISBN #:

0729403270

Author:

Robert L. Dawson

ISBN #:

0729404412

Author:

Robert L. Dawson

ISBN #:

0729408817

Author:

Robert Brian Dawson

ISBN #:

0258970294

US Patent:

6472751, Oct 29, 2002

Filed:

Sep 6, 2000

Appl. No.:

09/656437

Inventors:

Robert C. Chen - Los Altos CA
Jeffrey A. Shields - Sunnyvale CA
Robert Dawson - Austin TX
Khanh Tran - San Jose CA

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

H01L 2940

US Classification:

257758, 257759, 257760, 257774, 257700, 257787, 257649, 257751, 438687, 438688, 438689

Abstract:

A dielectric interlayer is formed over a semiconductor substrate comprising at least one active region. The exposed upper surface of the dielectric interlayer is treated with nitrogen to form a nitrided barrier layer thereon. At least one hydrogen-containing dielectric layer is formed over the dielectric interlayer having the nitrided barrier layer thereon. The nitrided barrier layer serves as a barrier to diffusion of hydrogen from the at least one hydrogen-containing dielectric layer into the dielectric interlayer, thereby preventing a decrease in hot carrier injection reliability.

US Patent:

6522013, Feb 18, 2003

Filed:

Aug 19, 1998

Appl. No.:

09/136527

Inventors:

Robert C Chen - Los Altos CA
Jeffrey A. Shields - Sunnyvale CA
Robert Dawson - Austin TX
Khanh Tran - San Jose CA

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

H01L 2348

US Classification:

257774, 257751, 257752, 257763

Abstract:

Punch-through vias are filled by initially depositing a thin, conformal layer of titanium nitride by chemical vapor deposition to cover an exposed upper surface of a lower metal feature, e. g. portions exposed by penetrating and undercutting an anti-reflective coating. A metal such as tungsten is subsequently deposited to fill the punch-through via. Embodiments include thermal decomposition of an organic-titanium compound, such as tetrakis-dimethylamino titanium, and treating the deposited titanium nitride in an H /N plasma to lower its resistivity. Moreover, the thickness of the anti-reflective coating can be reduced and the process window for etching the via widened.

US Patent:

60877243, Jul 11, 2000

Filed:

May 27, 1998

Appl. No.:

9/084737

Inventors:

Jeffrey A. Shields - Sunnyvale CA
Khanh Tran - San Jose CA
Robert Chen - Los Altos CA
Robert Dawson - Austin TX

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

H01L 2348
H01L 2352
H01L 2940

US Classification:

257734

Abstract:

HSQ is employed for gap filling patterned metal layers. The surface of the deposited HSQ gap fill layer is modified to decrease its plasma etching rate. Embodiments include modifying the HSQ surface by exposure to a plasma, such as a nitrogen-containing plasma, e. g. , a plasma containing ammonia or hydrogen/nitrogen, to form a nitrided surface region. Reduction of the plasma etching rate of HSQ enables formation of reliable low resistance borderless vias.

US Patent:

60431474, Mar 28, 2000

Filed:

Dec 18, 1997

Appl. No.:

8/993119

Inventors:

Robert C. Chen - Los Altos CA
Jeffrey A. Shields - Sunnyvale CA
Robert Dawson - Austin TX
Khanh Tran - San Jose CA

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

H01L 21316

US Classification:

438624

Abstract:

Patterned metal layers are gap filled with HSQ and passivated to stabilize the dielectric constant of the HSQ substantially at the as-deposited value prior to oxide deposition by PECVD and planarization. Passivation and stabilization are effected by treating the as--deposited HSQ layer in a silane (SiH. sub. 4) containing plasma.

US Patent:

60603844, May 9, 2000

Filed:

Oct 23, 1998

Appl. No.:

9/177482

Inventors:

Robert C. Chen - Los Altos CA
Jeffrey A. Shields - Sunnyvale CA
Robert Dawson - Austin TX
Khanh Tran - San Jose CA

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

H01L 2144

US Classification:

438623

Abstract:

Spin-on HSQ is employed to gap fill metal layers in manufacturing a high density, multi-metal layer semiconductor device. The degradation of deposited HSQ layers during formation of borderless vias, as from photoresist stripping using an O. sub. 2 -containing plasma, is overcome by treating the degraded HSQ layer with an H. sub. 2 -containing plasma to restore the dangling Si--H bonds, thereby passivating the surface and preventing moisture absorption, before filling the via opening with conductive material, such as a barrier layer.

US Patent:

60838515, Jul 4, 2000

Filed:

Jun 14, 1999

Appl. No.:

9/332368

Inventors:

Jeffrey A. Shields - Sunnyvale CA
Khanh Tran - San Jose CA
Robert Chen - Los Altos CA
Robert Dawson - Austin TX

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

H01L 21318

US Classification:

438776

Abstract:

HSQ is employed for gap filling patterned metal layers. The surface of the deposited HSQ gap fill layer is modified to decrease its plasma etching rate. Embodiments include modifying the HSQ surface by exposure to a plasma, such as a nitrogen-containing plasma, e. g. , a plasma containing ammonia or hydrogen/nitrogen, to form a nitrided surface region. Reduction of the plasma etching rate of HSQ enables formation of reliable low resistance borderless vias.

US Patent:

61943282, Feb 27, 2001

Filed:

Dec 9, 1998

Appl. No.:

9/207676

Inventors:

Robert C. Chen - Los Altos CA
Jeffrey A. Shields - Sunnyvale CA
Robert Dawson - Austin TX
Khanh Tran - San Jose CA

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

H01L 2131

US Classification:

438775

Abstract:

A dielectric interlayer is formed over a semiconductor substrate comprising at least one active region. The exposed upper surface of the dielectric interlayer is treated with nitrogen to form a nitrided barrier layer thereon. At least one hydrogen-containing dielectric layer is formed over the dielectric interlayer having the nitrided barrier layer thereon. The nitrided barrier layer serves as a barrier to diffusion of hydrogen from the at least one hydrogen-containing dielectric layer into the dielectric interlayer, thereby preventing a decrease in hot carrier injection reliability.

US Patent:

58669450, Feb 2, 1999

Filed:

Oct 16, 1997

Appl. No.:

8/951592

Inventors:

Robert C. Chen - Los Altos CA
Jeffrey A. Shields - Sunnyvale CA
Robert Dawson - Austin TX
Khanh Tran - San Jose CA

Assignee:

Advanced Micro Devices - Sunnyvale CA

International Classification:

H01L 2348
H01L 2352

US Classification:

257750

Abstract:

Spin-on HSQ is employed to gap fill metal layers in manufacturing a high density, multi-metal layer semiconductor device. The degradation of deposited HSQ layers during formation of borderless vias, as from photoresist stripping using an O. sub. 2 -containing plasma, is overcome by treating the degraded HSQ layer with an H. sub. 2 -containing plasma to restore the dangling Si--H bonds, thereby passivating the surface and preventing moisture absorption, before filling the via opening with conductive material, such as a barrier layer.