Alex Choi

US Patent:

6452802, Sep 17, 2002

Filed:

Jul 2, 2001

Appl. No.:

09/898212

Inventors:

Allen K. Lam - Fremont CA
Richard K. Williams - Cupertino CA
Alex K. Choi - Cupertino CA

Assignee:

Advanced Analogic Technologies, Inc. - Sunnyvale CA

International Classification:

H05K 720

US Classification:

361704, 257669, 257694, 361773, 361813

Abstract:

A semiconductor package contains a plurality of sheet metal leads that are attached to one or more terminals on a top side of a semiconductor die. A heat sink is attached to a terminal on a bottom side of the die. Each of the leads extends across the die and beyond opposite edges of the die and is symmetrical about an axis of the die. At the locations where the leads pass over the edges of the die notches are formed on the sides of the leads which face the die, thereby assuring that there is no contact between the leads and the peripheral portion of the top surface of the die. Particularly in power MOSFETs the peripheral portion of the top surface normally contains an equipotential ring which is directly connected to the backside (drain) of the MOSFET, and hence a short between the leads on the top of the die and the equipotential ring would destroy the device. The result is a package that is extremely rugged and that is symmetrical about the axis of the die. To avoid shorting between adjacent leads, moats are formed in the leads where they face the die to prevent liquid epoxy or solder from spreading between the leads.

US Patent:

6800932, Oct 5, 2004

Filed:

Jan 30, 2002

Appl. No.:

10/066023

Inventors:

Allen K. Lam - Fremont CA
Richard K. Williams - Cupertino CA
Alex K. Choi - Cupertino CA

Assignee:

Advanced Analogic Technologies, Inc. - Sunnyvale CA

International Classification:

H05K 720

US Classification:

257706, 257707, 257669, 257694, 257666, 257712, 257713, 257675, 361704, 361773, 361813

Abstract:

A semiconductor package contains a plurality of sheet metal leads that are attached to one or more terminals on a top side of a semiconductor die. A heat sink is attached to a terminal on a bottom side of the die. Each of the leads extends across the die and beyond opposite edges of the die and is symmetrical about an axis of the die. At the locations where the leads pass over the edges of the die notches are formed on the sides of the leads which face the die, thereby assuring that there is no contact between the leads and the peripheral portion of the top surface of the die. Particularly in power MOSFETs the peripheral portion of the top surface normally contains an equipotential ring which is directly connected to the backside (drain) of the MOSFET, and hence a short between the leads on the top of the die and the equipotential ring would destroy the device. The result is a package that is extremely rugged and that is symmetrical about the axis of the die. To avoid shorting between adjacent leads, moats are formed in the leads where they face the die to prevent liquid epoxy or solder from spreading between the leads.

US Patent:

8589110, Nov 19, 2013

Filed:

Mar 3, 2009

Appl. No.:

12/380663

Inventors:

Guang Liu - Lake Zurich IL, US
Alex Kurnia Choi - Lake Zurich IL, US

Assignee:

Synergistic Technologies Solutions, Inc. - Buffalo Grove IL

International Classification:

G01R 31/40
G01R 31/42

US Classification:

702118, 32476401, 702117, 702121

Abstract:

A cost-effective system architecture and apparatus for programmable automatic power supply testing. The system utilizes board level interface between various system testing modules and an Automatic Test Controller (ATC). The ATC receives coded test requests from the software on an industrial PC and control the various testing modules inside ATC to execute the tests. Test results were sent back to the PC and saved in a result file. A single industrial PC can control two or more ATC's and test two or more power supply units simultaneously. The ATC based test system is lower cost than the conventional Automatic Test Equipment which uses device level interface and standardized test devices.

US Patent:

20130002239, Jan 3, 2013

Filed:

Jul 2, 2012

Appl. No.:

13/540417

Inventors:

John G. Konopka - Spring Grove IL, US
Alex K. Choi - Lake Zurich IL, US
David A. Konopka - Grayslake IL, US

International Classification:

G01R 1/067
G01R 19/00

US Classification:

324149

Abstract:

The present invention is an efficient high voltage sensing mechanism that operates only when an individual needs to test the voltage across a wire. The present invention attaches around a tested wire using a jaw and a hook. The hook is tensioned using an expansion spring. The operator propels the hook outwards from the jaw, around the tested wire; thereafter, the expansion spring retracts to latch onto the tested wire against the jaw. An on-off switch is integrated into the mechanical hook device. As the hook is propelled outwards, the on-off switch moves into the “on” position, which powers the electrical processing and voltage analysis equipment. Once the hook is returned to the initial position, the on-off switch moves to the “off” position. This arrangement allows the present invention to remain unpowered for any instance a wire is not being tested. The present invention detects voltage through capacitive coupling.

US Patent:

62562002, Jul 3, 2001

Filed:

May 27, 1999

Appl. No.:

9/322124

Inventors:

Allen K. Lam - Fremont CA
Richard K. Williams - Cupertino CA
Alex K. Choi - Cupertino CA

International Classification:

H05K 720
H01L 23495

US Classification:

361704

Abstract:

A semiconductor package contains a plurality of sheet metal leads that are attached to one or more terminals on a top side of a semiconductor die. A heat sink is attached to a terminal on a bottom side of the die. Each of the leads extends across the die and beyond opposite edges of the die and is symmetrical about an axis of the die. At the locations where the leads pass over the edges of the die notches are formed on the sides of the leads which face the die, thereby assuring that there is no contact between the leads and the peripheral portion of the top surface of the die. Particularly in power MOSFETs the peripheral portion of the top surface normally contains an equipotential ring which is directly connected to the backside (drain) of the MOSFET, and hence a short between the leads on the top of the die and the equipotential ring would destroy the device. The result is a package that is extremely rugged and that is symmetrical about the axis of the die. To avoid shorting between adjacent leads, moats are formed in the leads where they face the die to prevent liquid epoxy or solder from spreading between the leads.