Allen Marilyn F Solomon

US Patent:

50362038, Jul 30, 1991

Filed:

Dec 20, 1989

Appl. No.:

7/454035

Inventors:

Allen L. Solomon - Fullerton CA

Assignee:

Grumman Aerospace Corporation - Bethpage NY

International Classification:

H01L 4902

US Classification:

25037006

Abstract:

An infrared detector array which is simultaneously responsive to two different portions of the infrared spectrum is disclosed. The array has detector elements formed upon the two opposite planar surfaces of a substrate. The detector elements formed upon the first surface of the substrate are responsive to a first portion of the infrared spectrum and the detector elements formed upon the second surface of the substrate are responsive to a second portion of the infrared spectrum. An intermediate layer of single crystalline material can be formed upon one or both surfaces of the substrate between the substrate and the dector elements. This intermediate layer of single crystalline material filters infrared radiation not within the second portion of the infrared spectrum to reduce the amount of infraed radiation not within the second portion of the infrared spectrum which is incident upon the detector elements formed upon the second surface of the substrate. The detector elements formed upon the first surface of the detector array may be specifically formed to be more responsive to infrared radiation within the first portion of the infrared spectrum than to infrared radiation within the second portion of the infrared spectrum. A second embodiment is disclosed wherein an array of non-single crystalline inerference filters is formed upon one surface of the substrate and a single crystalline detector is then grown graphotaxially through a small hole in each non-single crystalline interference filter.

US Patent:

49929089, Feb 12, 1991

Filed:

Jul 24, 1989

Appl. No.:

7/383429

Inventors:

Allen L. Solomon - Fullerton CA

Assignee:

Grumman Aerospace Corporation - Bethpage NY

International Classification:

H05K 702

US Classification:

361400

Abstract:

An integrated circuit module and technique for forming the same are disclosed. The module includes a plurality of integrated circuit layers having beveled vertical edges along a portion thereof. The layers are connected to a contact board disposed orthogonal to the layers and also having a beveled first surface formed to receive and support the integrated circuit layers.

US Patent:

50672339, Nov 26, 1991

Filed:

Jan 12, 1990

Appl. No.:

7/464440

Inventors:

Allen L. Solomon - Fullerton CA

Assignee:

Grumman Aerospace Corporation - Bethpage NY

International Classification:

H01K 310

US Classification:

29852

Abstract:

A method of forming an integrated circuit module ae disclosed. The module includes a plurality of integrated circuit layers having beveled vertical edges along a portion thereof. The layers are connected to a contact board disposed orthogonal to the layers and also having a beveled first surface formed to receive and support the integrated circuit layers.

US Patent:

50139193, May 7, 1991

Filed:

Oct 17, 1989

Appl. No.:

7/422731

Inventors:

Allen L. Solomon - Fullerton CA

Assignee:

Grumman Aerospace Corporation - Bethpage NY

International Classification:

G01J 502

US Classification:

250349

Abstract:

A detector element signal comparator system is used for noise reduction and image enhancement by comparing the output of any detector signal processor within a module to the output of any other detector signal processor within the same module. The detector element signal comparator system has a comparator for each detector signal processor, a comparator bus to connect the output of any detector signal processor to the comparators of all other detector signal processors, a switch for each detector signal processor to selectively connect each detector signal processor to the comparator bus, and an output bus for communicating the comparator signal from the detector element signal comparator to the next stage of signal processing.

US Patent:

49071289, Mar 6, 1990

Filed:

Dec 15, 1988

Appl. No.:

7/284929

Inventors:

Allen L. Solomon - Fullerton CA
Sus Mayemura - Laguna Hills CA
Frank Piersanti - Orange CA

Assignee:

Grumman Aerospace Corporation - Bethpage NY

International Classification:

H05K 118

US Classification:

361412

Abstract:

A process for bonding electrical terminals of an integrated circuit chip to conductive regions of a multilayered circuit board is disclosed, along with the resulting multilayer module. The process comprises forming a plurality of circuit board layers and stacking them to define a well area therein. The well area having a base defined by one of the circuit board layers and sidewalls defined by vertical edge portions of a plurality of the remaining circuit board layers, the conductive patterns having conductive termination regions formed adjacent to the vertical edge portions. Conductive vertical vias are formed along vertical edge portions of a plurality of circuit board layers in electrical communication with the conductive termination regions. Flexible conductive strips are applied to the integrated circuit in electrical communication with the integrated circuit terminals. The conductive strips extend beyond the integrated circuit extend along the conductive vias, and be in electrical communication therewith, as the integrated circuit is disposed within the well area.

US Patent:

49886410, Jan 29, 1991

Filed:

Oct 10, 1989

Appl. No.:

7/419211

Inventors:

Allen L. Solomon - Fullerton CA

Assignee:

Grumman Aerospace Corporation - Bethpage NY

International Classification:

H01L 2120

US Classification:

437 83

Abstract:

A polycrystalline or amorphous substrate having a single crystalline layer formed thereupon for making a photosensitive detector array and a method for forming the same are disclosed. The single crystalline layer is grown by graphotaxy, i. e. lateral epitaxy, upon the non-single crystalline substrate. A seed crystal of the material which will comprise the layer to be grown is embedded in the substrate. Graphotaxial growth occurs from the seed crystal and travels across the surface of the substrate. Various methods of obtaining graphotaxial growth are disclosed.

US Patent:

53151470, May 24, 1994

Filed:

Sep 25, 1989

Appl. No.:

7/412161

Inventors:

Allen L. Solomon - Fullerton CA

Assignee:

Grumman Aerospace Corporation - Bethpage NY

International Classification:

H01L 2713

US Classification:

257448

Abstract:

An integrated circuit wafer is formed as a monolithic focal plane array having signal processing circuitry formed upon a first surface thereof and infrared detector elements formed upon a second surface thereof. A process for forming the same is also disclosed. The wafer has an array of waffle-like hollows formed upon one surface. The floor of each hollow has a dense array of small diameter vias formed thereon. The vias extend through the wafer to the second surface thereof. Conductive conduits are formed through the hollows and vias to connect infrared detectors on the second side of the wafer to their associated signal processing circuitry formed upon the first side of the wafer.

US Patent:

50937081, Mar 3, 1992

Filed:

Aug 20, 1990

Appl. No.:

7/570135

Inventors:

Allen L. Solomon - Fullerton CA

Assignee:

Grumman Aerospace Corporation - Bethpage NY

International Classification:

H01L 2348
H01L 21302

US Classification:

357 68

Abstract:

A multilayer integrated circuit module for supporting integrated circuit chips and for interfacing the chips to external circuitry is disclosed. Each integrated circuit is formed to have conductive contact pads disposed upon beveled edges. The module is comprised of a base layer and a plurality of stacked layers having apertures formed therein and disposed upon the base layer such that at least one well is formed. The aperture defining inclined sidewalls with conductive conduits formed thereon. The inclined sidewalls are formed to support the integrated circuit chips upon the beveled surfaces thereof. The conductive conduits formed on the incline sidewalls contact the integrated circuit chip conductive contact pads. The base layer has conductive conduits formed thereon, the base layer further has vertically inclined surfaces spaced to receive and support the integrated circuit chips along beveled edge portions thereof. The base layer conductive conduits extend along the vertically inclined surfaces and contact the integrated circuit conductive contact pads.