Chris E Haga

US Patent:

7498203, Mar 3, 2009

Filed:

Apr 20, 2006

Appl. No.:

11/407836

Inventors:

Chris Haga - McKinney TX, US
Leland Swanson - McKinney TX, US

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

H01L 21/44
H01L 21/48
H01L 21/50

US Classification:

438122, 438125

Abstract:

The invention provides thermally enhanced BGAs and methods for their fabrication with a ground ring suitable for operably coupling to either the frontside or backside, or both, of an IC chip mounted on a substrate. The methods and devices of the invention disclosed include the fabrication of a ground ring on the surface of a BGA substrate prepared for receiving the frontside of the chip. A heat spreader has ground ring corresponding to substrate round ring and is attached at the backside of the chip with a conductive material. A conductive material is interposed between the heat spreader and substrate ground rings, electrically coupling them. Thus, the backside of the chip may be electrically connected to the ground ring as well as, or instead of, the frontside.

US Patent:

7612437, Nov 3, 2009

Filed:

Jan 23, 2007

Appl. No.:

11/656689

Inventors:

Chris Edward Haga - McKinney TX, US
Anthony Louis Coyle - Plano TX, US
William David Boyd - Frisco TX, US

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

H01L 23/495

US Classification:

257675, 257712, 257784, 257E23031, 257E5102

Abstract:

In a method and system for fabricating a thermally enhanced semiconductor device () is packaged as a through hole single inline package (SIP). A leadframe () having a die pad () to attach an IC die (), a first plurality of conductive leads () formed from a first portion of metal sheet (), and a second portion of metal sheet () disposed on an opposite side of the IC die () as the first plurality of conductive leads is stamped from a metal sheet. The first plurality of conductive leads () are arranged in a single line and are capable of being through hole mounted in accordance with the SIP. The second portion of metal sheet () includes the die pad () to form a heat spreader () in the form of the metal sheet. The heat spreader () provides heat dissipating for the heat generated by the IC die ().

US Patent:

8053285, Nov 8, 2011

Filed:

Sep 24, 2009

Appl. No.:

12/565976

Inventors:

Chris E Haga - McKinney TX, US
Anthony L Coyle - Plano TX, US
William D Boyd - Frisco TX, US

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

H01L 21/44
H01L 21/48
H01L 21/50

US Classification:

438123, 438617, 257E23031, 257E5102

Abstract:

In a method and system for fabricating a thermally enhanced semiconductor device () is packaged as a through hole single inline package (SIP). A leadframe () having a die pad () to attach an IC die (), a first plurality of conductive leads () formed from a first portion of metal sheet (), and a second portion of metal sheet () disposed on an opposite side of the IC die () as the first plurality of conductive leads is stamped from a metal sheet. The first plurality of conductive leads () are arranged in a single line and are capable of being through hole mounted in accordance with the SIP. The second portion of metal sheet () includes the die pad () to form a heat spreader () in the form of the metal sheet. The heat spreader () provides heat dissipating for the heat generated by the IC die ().

US Patent:

20050151268, Jul 14, 2005

Filed:

Apr 16, 2004

Appl. No.:

10/826713

Inventors:

William Boyd - Frisco TX, US
Chris Haga - McKinney TX, US
Anthony Coyle - Plano TX, US
Leland Swanson - McKinney TX, US
Quang Mai - Sugar Land TX, US

International Classification:

H01L021/48
H01L029/40

US Classification:

257778000, 438108000, 257781000, 257784000, 438617000, 257737000, 438613000

Abstract:

A method for assembling a whole semiconductor wafer () with a plurality of device units () having metal contact pads. Each contact pad has a patterned barrier metal layer and a metal stud (103, preferably copper or nickel) with an outer surface suitable to form metallurgical bonds without melting. A leadframe suitable for the whole wafer is provided, which has a plurality of segments groups (), each group suitable for one device unit; each segment has first () and second ends () covered by solderable metal. A predetermined amount of solder paste () is placed on each of the first segment ends. The leadframe is then aligned with the wafer so that each of the paste-covered segment ends is aligned with the corresponding metal stud of the respective device unit. The leadframe is connected to the wafer and the whole wafer is encapsulated () so that the device units and the first segment ends are covered, while the second segment ends remain exposed. The encapsulated wafer is separated () into individual device units ().

US Patent:

20050280124, Dec 22, 2005

Filed:

Jun 18, 2004

Appl. No.:

10/871645

Inventors:

Anthony Coyle - Plano TX, US
William Boyd - Plano TX, US
Chris Haga - McKinney TX, US
Leland Swanson - McKinney TX, US

International Classification:

H01L023/495

US Classification:

257666000

Abstract:

A semiconductor device comprising a metallic leadframe () with a first surface () and a second surface (). The leadframe includes a chip pad () and a plurality of segments (); the chip pad is held by a plurality of straps (), wherein each strap has a groove (). A chip () is mounted on the chip pad and electrically connected to the segments. A heat spreader () is disposed on the first surface of the leadframe; the heat spreader has its central portion () spaced above the chip connections (), and also has positioning members () extending outwardly from the edges of the central portion so that they rest in the grooves of the straps. Encapsulation material surrounds the chip, the electrical connections, and the spreader positioning members, and fills the space between the spreader and the chip, while leaving the second leadframe surface and the central spreader portion exposed.

US Patent:

20060226521, Oct 12, 2006

Filed:

Jun 23, 2006

Appl. No.:

11/426166

Inventors:

Anthony Coyle - Plano TX, US
William Boyd - Plano TX, US
Chris Haga - McKinney TX, US
Leland Swanson - McKinney TX, US

International Classification:

H01L 23/495

US Classification:

257666000

Abstract:

A semiconductor device comprising a metallic leadframe () with a first surface () and a second surface (). The leadframe includes a chip pad () and a plurality of segments (); the chip pad is held by a plurality of straps (), wherein each strap has a groove (). A chip () is mounted on the chip pad and electrically connected to the segments. A heat spreader () is disposed on the first surface of the leadframe; the heat spreader has its central portion () spaced above the chip connections (), and also has positioning members () extending outwardly from the edges of the central portion so that they rest in the grooves of the straps. Encapsulation material surrounds the chip, the electrical connections, and the spreader positioning members, and fills the space between the spreader and the chip, while leaving the second leadframe surface and the central spreader portion exposed.

US Patent:

20070090533, Apr 26, 2007

Filed:

Oct 24, 2005

Appl. No.:

11/257252

Inventors:

Chris Haga - McKinney TX, US
Anthony Coyle - Plano TX, US

International Classification:

H01L 23/52

US Classification:

257777000

Abstract:

According to one or more aspects of the present invention, a flip chip BGA packaging or mounting arrangement is disclosed where a grounding connection of implemented on the back of the chip. The grounding connection comprises one or more metal strips that are situated between the back of the chip and a printed circuit board upon which the chip is operatively coupled via BGA, or between that back of the chip and a heat spreader that is itself operatively coupled to the printed circuit board. The backside grounding connection enhances stability in switching applications, for example, particularly where the chip includes silicon on insulator (SOI) wafer processing.

US Patent:

20080079124, Apr 3, 2008

Filed:

Apr 12, 2007

Appl. No.:

11/734479

Inventors:

CHRIS EDWARD HAGA - McKinney TX, US
WILLIAM DAVID BOYD - Frisco TX, US
ANTHONY LOUIS COYLE - Plano TX, US

International Classification:

H01L 23/495
H01L 21/00

US Classification:

257666, 438123, 257E23031, 257E21001

Abstract:

One embodiment of the present Invention includes an integrated circuit (IC) package. The IC package comprises a semiconductor die comprising at least one IC. The semiconductor die can include a plurality of conductive elements disposed on a first surface of the semiconductor die. The IC package also comprises a die pad coupled to a second surface of the semiconductor die. The IC package further comprises a leadframe comprising a plurality of leadfingers to which a portion of the conductive elements are conductively coupled. At least a portion of the plurality of leadfingers can be interdigitated with at least a portion of the die pad.