Felix Hiroshi Fujishiro from Wilmette, IL, age 64

Integrated Circuit Manufacture Method With Aqueous Hydrogen Fluoride And Nitric Acid Oxide Etch
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US Patent:

6429144, Aug 6, 2002
Filed:

Dec 28, 1999
Appl. No.:

09/473451
Inventors:

Landon B. Vines - San Antonio TX
Felix H. Fujishiro - San Jose CA
Yu-Pin Han - Dallas TX
Assignee:

Koninklijke Philips Electronics N.V. - Eindhoven
International Classification:

H01L 21302
US Classification:

438745, 438750, 438753, 438756, 134 11, 134 12
Abstract:

In the manufacture of an integrated circuit, contaminated oxide is replaced by relatively pure oxide using the following steps. First, a partially manufactured integrated circuit is bathed in an aqueous solution of hydrogen peroxide and ammonium hydroxide to oxidize organic materials and weaken bonds of metal contaminants to the integrated circuit substrate. Second, an aqueous rinse removes the oxidized organic materials and metal contaminants. Third, the integrated circuit is bathed in an aqueous solution of hydrogen fluoride and nitric acid. The hydrogen fluroide etches the contaminated oxide; the nitric acid combines with calcium and metal contaminants freed as the oxide is etched. The resulting nitride byproducts are highly soluble and easily removed in the following aqueous rinse. A drying step removes rinse water from the integrated circuit. Finally, an oxide formation step provides a relatively pure oxide layer.

Method Of Identifying A Weakest Interface Where Delamination Is Most Likely To Occur In A Multi-Layer Dielectric Film Stack
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US Patent:

54939267, Feb 27, 1996
Filed:

Mar 21, 1995
Appl. No.:

8/408652
Inventors:

Landon B. Vines - San Antonio TX
Felix H. Fujishiro - San Jose CA
Danny W. Echtle - San Antonio TX
Annette Garcia - Pleasanton TX
Assignee:

VLSI Technology, Inc. - San Jose CA
International Classification:

G01N 1700
US Classification:

738659
Abstract:

A method of identifying a weakest interface where delamination is most likely to occur in a multi-layer dielectric film stack formed on a semiconductor wafer includes scribing processed layers including the multi-layer dielectric film stack with an applied force of a selected and constant magnitude, measuring the depth of a cavity formed in the processed layers by such scribing, and identifying the weakest interface by comparing the measured depth against the known depths of the interfaces between adjacent layers of the multi-layer dielectric film stack.

Titanium Boride And Titanium Silicide Contact Barrier Formation For Integrated Circuits
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US Patent:

57459908, May 5, 1998
Filed:

Jun 6, 1995
Appl. No.:

8/471253
Inventors:

Landon B. Vines - San Antonio TX
Felix H. Fujishiro - San Jose CA
Sigmund Koenigseder - San Antonio TX
Assignee:

VLSI Technology, Inc. - San Jose CA
International Classification:

H01K 310
US Classification:

29852
Abstract:

Titanium is deposited using a low-pressure chemical-vapor deposition to provide good step coverage over an underlying integrated circuit structure. A rapid thermal anneal is performed using an ambient including diborane. The rapid thermal anneal causes the titanium to interact with underlying silicon to form titanium silicide. Concurrently, the diborane reacts with the titanium to form titanium boride. A composite barrier layer results. Aluminum is deposited and then patterned together with the composite barrier layer to define a first level metalization. Subsequent intermetal dielectrics, metalization, and passivation layers can be added to form a multi-level metal interconnect structure. The titanium boride prevents the aluminum from migrating into the silicon, while the titanium silicide lowers the contact resistivity associated with the barrier layer. The relatively close match of the thermal coefficients of expansion for titanium boride and silicon provides high thermal stability.

Integrated-Circuit Manufacture Method With Aqueous Hydrogen-Fluoride And Nitric-Acid Oxide Etch
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US Patent:

60076410, Dec 28, 1999
Filed:

Mar 14, 1997
Appl. No.:

8/818228
Inventors:

Landon B. Vines - San Antonio TX
Felix H. Fujishiro - San Jose CA
Yu-Pin Han - Dallas TX
Assignee:

VLSI Technology, Inc. - San Jose CA
International Classification:

B08B 300
US Classification:

134 26
Abstract:

In the manufacture of an integrated circuit, contaminated oxide is replaced by relatively pure oxide using the following steps. First, a partially manufactured integrated circuit is bathed in an aqueous solution of hydrogen peroxide and ammonium hydroxide to oxidize organic materials and weaken bonds of metal contaminants to the integrated circuit substrate. Second, an aqueous rinse removes the oxidized organic materials and metal contaminants. Third, the integrated circuit is bathed in an aqueous solution of hydrogen fluoride and nitric acid. The hydrogen fluroide etches the contaminated oxide; the nitric acid combines with calcium and metal contaminants freed as the oxide is etched. The resulting nitride byproducts are highly soluble and easily removed in the following aqueous rinse. A drying step removes rinse water from the integrated circuit.

Felix Hiroshi Fujishiro