Jagadeesh S Moodera

US Patent:

7741634, Jun 22, 2010

Filed:

Mar 26, 2008

Appl. No.:

12/055593

Inventors:

Heejae Shim - Medford NY, US
Jagadeesh S. Moodera - Somerville MA, US

Assignee:

Massachusetts Institute of Technology - Cambridge MA

International Classification:

H01L 23/48
H01L 29/08
H01L 21/00

US Classification:

257 36, 257E39006, 438 2, 505190, 505329

Abstract:

A Josephson junction (JJ) device includes a buffered substrate comprising a first buffer layer formed on a substrate. A second buffer layer is formed on the first buffer layer. The second buffer layer includes a hexagonal compound structure. A trilayer structure is formed on the buffered substrate comprising at least two layers of a superconducting material. A thin tunnel barrier layer is positioned between the at least two layers. The buffered substrate is used to minimize lattice mismatch and interdiffusion in the trilayer structure so as to allow the JJ device to operate above 20 K.

US Patent:

20080152952, Jun 26, 2008

Filed:

Dec 4, 2007

Appl. No.:

11/949988

Inventors:

Tiffany S. Santos - Downers Grove IL, US
Joo Sang Lee - Seoul, KR
Hyunja Shim - Cambridge MA, US
Jagadeesh S. Moodera - Somerville MA, US

International Classification:

G11B 5/39
H01L 21/02

US Classification:

4288111, 438 3, 438 99, 257 40, 257E51024, 257E21002

Abstract:

The organic spin transport device, such as a magnetic tunnel junction or a transistor, includes at least two ferromagnetic material electrodes. At least one organic semiconductor structure is formed between the at least two ferromagnetic material electrodes. At least one buffer layer is positioned between the at least one organic semiconductor structure and the at least two ferromagnetic material electrodes. The at least one buffer layer reduces spin scattering between the at least two ferromagnetic material electrodes and the at least one organic semiconductor structure. The device exhibits a magnetoresistive effect that depends on the relative magnetization of the two ferromagnetic material electrodes.

US Patent:

20090141409, Jun 4, 2009

Filed:

Dec 3, 2007

Appl. No.:

11/949208

Inventors:

Tiffany S. Santos - Downers Grove IL, US
Jagadeesh S. Moodera - Somerville MA, US

International Classification:

G11B 5/127

US Classification:

3603242

Abstract:

A spin filter transistor having a semiconductor structure. A spin injector including a first spin filter tunnel barrier is positioned on the semiconductor structure. A spin detector including a second spin filter tunnel barrier is positioned on the semiconductor. Highly polarized spins injected from the spin injector are transported through the semiconductor structure, and are detected at the spin detector. The magnitude of the spin current depends on the relative magnetic alignment of the first spin filter tunnel barrier and the second spin filter tunnel barrier.

US Patent:

20140062530, Mar 6, 2014

Filed:

Mar 9, 2011

Appl. No.:

13/044045

Inventors:

Jagadeesh S. Moodera - Somerville MA, US

Assignee:

MASSACHUSETTS INSTITUTE OF TECHNOLOGY - Cambridge MA

International Classification:

G11C 11/16
H01L 43/12

US Classification:

326 37, 438 3, 365158

Abstract:

A magnetic memory cell is provided that includes a free layer that is pinned on both of its sides to form one or more domain wall structures. The one or more domain wall structures define one or more logic states by controlling the motion of the one or more domain wall structures.

US Patent:

56299222, May 13, 1997

Filed:

Mar 21, 1995

Appl. No.:

8/407761

Inventors:

Jagadeesh S. Moodera - Somerville MA
Terrilyn Wong - Cambridge MA
Lisa Kinder - Charleston WV
Robert H. Meservey - Lexington MA

Assignee:

Massachusetts Institute of Technology - Cambridge MA

International Classification:

G11B 900
G11C 1115
H01L 2722

US Classification:

369126

Abstract:

Ferromagnetic/insulator/ferromagnetic tunneling has been shown to give over 10% change in the junction resistance with H less than 100 Oe, at room temperature but decreases at high dc-bias across the junction. Using such junctions as magnetic sensors or memory elements would have several advantages; it is a trilayer device and does not strongly depend on the thickness of FM electrodes or the tunnel barrier; submicron size is possible with high junction resistance and low power dissipation. The magnitude of the effect is consistent with the simple model of spin-polarized tunneling between ferromagnets.

US Patent:

58353143, Nov 10, 1998

Filed:

Nov 8, 1996

Appl. No.:

8/747152

Inventors:

Jagadeesh S. Moodera - Somerville MA
Janusz Nowak - Somerville MA
Lisa Kinder - Boston MA
Patrick LeClair - Cambridge MA

Assignee:

Massachusetts Institute of Technology - Cambridge MA

International Classification:

G11B 539
G11C 1100

US Classification:

360113

Abstract:

Ferromagnetic-insulator-ferromagnetic trilayer junctions show magnetoresistance (JMR) effects ranging from about 16% to several hundred percent at room temperature. Larger effects are observed when the actual tunneling resistance (R. sub. T) is comparable to electrode film resistance (R. sub. L) over the junction area in cross-geometry junction measurements. The geometrically enhanced large JMR can be qualitatively explained by the nonuniform current flow over the function area when R. sub. T is comparable to R. sub. L, in the cross-geometry junction structure. For a fixed junction area, the effective junction resistance (R. sub. J) can be varied from less than 1 ohm to several kilohms by controlling the thickness of the insulating layer or by appropriately selecting ferromagnetic films. The trilayer tunnel junctions of the present invention are nonvolatile, stable and are reproducible.

US Patent:

20200356887, Nov 12, 2020

Filed:

May 6, 2020

Appl. No.:

16/867601

Inventors:

Jagadeesh S. Moodera - Somerville MA, US
Patrick A. LEE - Brookline MA, US
Peng Wei - Riverside CA, US
Sujit Manna - , US

International Classification:

G06N 10/00
H01L 27/18
H01L 39/08
H01L 29/06

Abstract:

Under certain conditions, a fermion in a superconductor can separate in space into two parts known as Majorana zero modes, which are immune to decoherence from local noise sources and are attractive building blocks for quantum computers. Here we disclose a metal-based heterostructure platform to produce these Majorana zero modes which utilizes the surface states of certain metals in combination with a ferromagnetic insulator and a superconductor. This platform has the advantage of having a robust energy scale and the possibility of realizing complex circuit designs using lithographic methods. The Majorana zero modes are interrogated using planar tunnel junctions and electrostatic gates to selectively tunnel into designated pairs of Majorana zero modes. We give example of qubit designs and circuits that are particularly suitable for the metal-based heterostructures.