Janet M. Brunsilius - Escondido CA, US Stephen R. Kosic - San Diego CA, US Corey D. Petersen - Poway CA, US
International Classification:
H03K 3/01 H01L 21/336
US Classification:
327534, 438197, 257E21409
Abstract:
A circuit includes an NMOS transistor having a drain and a source, a p-well containing the drain and the source, an n-well under the p-well, and a first well switch configured to selectively connect the n-well to a predetermined voltage in response to an enable phase of a first switching signal. The first well switch can be configured to connect the n-well to the predetermined voltage during the enable phase of the first switching signal and to electrically float the n-well during a non-enable phase of the first switching signal.
Janet M. BRUNSILIUS - Escondido CA, US Stephen R. KOSIC - San Diego CA, US Corey D. PETERSEN - Poway CA, US
Assignee:
ANALOG DEVICES, INC. - Norwood MA
International Classification:
H03K 3/01
US Classification:
327534
Abstract:
A circuit can include an NMOS transistor having a drain and a source, a p-well containing the drain and the source, an n-well under the p-well, a circuit node, and a connection element connecting the n-well to the circuit node. The connection element can include a diode having an anode terminal connected to the circuit node and a cathode terminal connected to the n-well, a resistor having a first terminal connected to the circuit node and a second terminal connected to the n-well, a conductor directly connecting the n-well to the circuit node, or a well switch configured to connect the n-well to the circuit node during an enable phase of a switching signal and to electrically float the n-well during a non-enable phase of the switching signal. The diode can include a diode-connected transistor. The circuit node can be configured to receive a predetermined voltage having a magnitude equal to or greater than an upper supply voltage.