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Jeff Lee Nilles

age ~68

from Los Altos, CA

Also known as:
  • Jeff Te Nilles
  • Jeff L Nilles
  • Jeffery Lee Nilles
  • Jeffery L Nilles
  • Jeffrey Lee Nilles
Phone and address:
1160 Seena Ave, Los Altos, CA 94024
6509612438

Jeff Nilles Phones & Addresses

  • 1160 Seena Ave, Los Altos, CA 94024 • 6509612438
  • Sunnyvale, CA
  • San Diego, CA
  • Madison, WI
  • Mountain View, CA

Work

  • Company:
    National semiconductor
    2004 to 2009
  • Position:
    Power analog design manager

Education

  • Degree:
    Bachelors, Bachelor of Science In Electrical Engineering
  • School / High School:
    University of Wisconsin - Madison
    1974 to 1979
  • Specialities:
    Engineering

Skills

Analog Circuit Design • Cmos • Circuit Design • Semiconductors • Bicmos • Mixed Signal • Analog • Power Management • Ic • Asic • Soc • Eda • Cadence Virtuoso • Silicon • Semiconductor Industry • Integrated Circuit Design • Low Power Design • Hardware Architecture • Semiconductor Device • Pll • Drc • Microelectronics • Physical Design • Spice • Lvs

Industries

Semiconductors

Us Patents

  • Apparatus And Method For Switching Regulator With Compensation Delay For Output Voltage Error Correction

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  • US Patent:
    7423414, Sep 9, 2008
  • Filed:
    Aug 4, 2005
  • Appl. No.:
    11/197646
  • Inventors:
    Barry James Culpepper - Sunnyvale CA, US
    Jeff L. Nilles - Los Altos CA, US
    Chunping Song - Santa Clara CA, US
  • Assignee:
    National Semiconductor Corporation - Santa Clara CA
  • International Classification:
    G05F 1/00
  • US Classification:
    323280, 323281
  • Abstract:
    A hysteretic regulator is provided. The hysteretic regulator includes a delay compensation circuit that adds a delay to the output of the hysteretic comparator. The delay is dependent on the input voltage. For low duty cycles, the slope of the inductor current is much greater for the rising edge than it is for the falling edge. The delay compensation circuit adds sufficient delay to the falling edge so that the undershoot cancels the overshoot.
  • Glitch-Free Start-Up With A Tracking Pin

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  • US Patent:
    7498874, Mar 3, 2009
  • Filed:
    Aug 3, 2006
  • Appl. No.:
    11/462311
  • Inventors:
    Faruk J. Nome - Sunnyvale CA, US
    Jeff Lee Nilles - Los Altos CA, US
  • Assignee:
    National Semiconductor Corporation - Santa Clara CA
  • International Classification:
    H03F 1/02
  • US Classification:
    330 9, 327124
  • Abstract:
    An error amplifier for closed loop operation is provided. The error amplifier has a track input and a feedback input. During soft-start, a voltage offset is added to the error amplifier input. In one embodiment, the voltage offset is gradually removed during the soft-start.
  • Switching Dc-To-Dc Converter And Conversion Method With Rotation Of Control Signal Channels Relative To Paralleled Power Channels

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  • US Patent:
    62462229, Jun 12, 2001
  • Filed:
    Aug 30, 2000
  • Appl. No.:
    9/650881
  • Inventors:
    Jeff L. Nilles - Los Altos CA
    Darryl Byron Phillips - Milpitas CA
  • Assignee:
    National Semiconductor Corporation - Santa Clara CA
  • International Classification:
    G05F 140
  • US Classification:
    323283
  • Abstract:
    A DC-to-DC converter having multiple power channels and a switching controller which generates a pulse-width modulated control signal for each power channel, and a switching controller for use in (and a method for generating power switch control signals for) such a converter. The control signals are generated in response to trigger signal trains generated by trigger channels. The trigger channels rotate relative to the power channels so that the control signals are generated in response to a sequence of trigger channel states. In some embodiments, the controller has one control signal channel and one trigger channel for each power channel. In other embodiments, there are N power channels, N control signal channels, and M reset channels (each for generating a trigger signal train), where M is an integer greater than N. The extra channel or channels is used for preventing rotation errors which would otherwise delay opening of the closed power switches. Preferably, the sequence of trigger channel states is a periodic sequence in which each trigger channel is provided sequentially to a repeating sequence of the control signal channels, but it is alternatively a non-periodic sequence in which each trigger channel is provided equally on a time-averaged basis to each control signal channel.
  • Multilevel Converter Using Node Voltage Track And Control

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  • US Patent:
    20190207505, Jul 4, 2019
  • Filed:
    Dec 29, 2017
  • Appl. No.:
    15/859039
  • Inventors:
    - Dallas TX, US
    Jeff Lee Nilles - Los Altos CA, US
    Sombuddha Chakraborty - Redwood City CA, US
    Farzad Sahandiesfanjani - San Jose CA, US
  • International Classification:
    H02M 1/08
    H02M 3/158
  • Abstract:
    In described examples, a system regulates provision of DC-DC electrical power. The system includes a DC-DC converter, an input voltage node to receive an input voltage, a current source, a voltage source node, and a ground switch. The DC-DC converter includes a flying capacitor and multiple converter switches. The current source is coupled between the input voltage node and a top plate of the flying capacitor, to provide current to the top plate when the current source is activated by an activation voltage. The voltage source node is coupled to the input voltage node and to the current source, to provide the activation voltage to the current source, such that the activation voltage is not higher than a selected voltage between: a breakdown voltage of the converter switches; and a maximum value of the input voltage minus the breakdown voltage. The ground switch is coupled between a bottom plate of the flying capacitor and a ground.

Resumes

Jeff Nilles Photo 1

Power Technologist - Distinguished Member Of Technical Staff

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Location:
1160 Seena Ave, Los Altos, CA 94024
Industry:
Semiconductors
Work:
National Semiconductor 2004 - 2009
Power Analog Design Manager

Texas Instruments 2004 - 2009
Power Technologist - Distinguished Member of Technical Staff

Crosspoint Solutions Semiconductor 1990 - 1992
Analog Design Engineer

National Semiconductor 1990 - 1992
Analog Design Engineer
Education:
University of Wisconsin - Madison 1974 - 1979
Bachelors, Bachelor of Science In Electrical Engineering, Engineering
Skills:
Analog Circuit Design
Cmos
Circuit Design
Semiconductors
Bicmos
Mixed Signal
Analog
Power Management
Ic
Asic
Soc
Eda
Cadence Virtuoso
Silicon
Semiconductor Industry
Integrated Circuit Design
Low Power Design
Hardware Architecture
Semiconductor Device
Pll
Drc
Microelectronics
Physical Design
Spice
Lvs

Classmates

Jeff Nilles Photo 2

Jeff Nilles

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Schools:
Ponderosa High School Parker CO 1990-1994
Jeff Nilles Photo 3

Ponderosa High School, Pa...

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Graduates:
Thomas McHale (1995-1999),
Jeff Nilles (1990-1994),
Alisha Morris (1994-1998),
Lady Eve Collins (1984-1988)
Jeff Nilles Photo 4

Hiawatha Elementary Schoo...

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Graduates:
Jeffrey Nilles (1991-1995),
Rusty Allen (1988-1992),
David Martinez (1995-1999),
Melanie Martin (1989-1991),
Kate Stricker (1992-1996),
Frank Janecek (1989-1992)
Jeff Nilles Photo 5

Hampton Bays High School,...

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Graduates:
Sharon Wouters (1966-1970),
Ernie Behrle (1968-1972),
Jeffrey Nilles (1970-1974),
Melissa Barkas (1990-1994),
George Overbeck (1985-1989)
Jeff Nilles Photo 6

Illinois State University...

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Graduates:
Jeffrey Nilles (1999-2003),
Cindy Gerlach (1987-1990),
Kristi Walls (2001-2003),
Robert Vaughan (1966-1971),
Sara Miller (1997-2001)
Jeff Nilles Photo 7

Morton West High School, ...

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Graduates:
Jeffrey Nilles (1995-1999),
Karen Budenz (1967-1971),
Jeff Janda (1981-1985),
Jeffrey Janda (1982-1986)

Facebook

Jeff Nilles Photo 8

Jeff Nilles

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Friends:
Wirtz Benny, Angelo Possing, Manon Diederich, Henky Tang, Enzo Mastrangelo

Youtube

Anika Nilles Jeff Beck 2022 Hard Rock Live Sa...

Anika Nilles rock solid drumming during Jeff Beck Show at the Hard Roc...

  • Duration:
    1m 13s

Anika Nilles, Jeff Beck live at York

  • Duration:
    3m 33s

ANIKA NILLES / NEVELL - FULL STUDIO LIVE SESS...

00:00 - Intro 00:33 - Mister 07:16 - Have You 12:56 - Wild Boy 17:28 -...

  • Duration:
    37m 47s

Anika Nilles Interview | Being Jeff Beck's dr...

Thanks for checking out episode 42 of Drum For The Song podcast featur...

  • Duration:
    1h 4m 24s

Anika Nilles - Drumming for Jeff Beck with ju...

If you enjoyed this clip, please check out episode 42 of Drum For The ...

  • Duration:
    3m 1s

Anika Nilles - How Jeff Beck asked me to play...

If you enjoyed this clip, please check out episode 42 of Drum For The ...

  • Duration:
    1m 21s

Rhonda Smith and Anika Nilles -Solos |You Kno...

From Jeff Beck and Johnny Depp show at Count Basie Theater, Red Bank N...

  • Duration:
    3m 2s

Anika Nilles - DRUM SOLO

Solo during live show in Cinncinati 2022.

  • Duration:
    2m 4s

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