Anatoly Gelman - San Diego CA, US Kiran Puttegowda - Irvine CA, US
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
G06F 1/32
US Classification:
713323, 455574, 713 2, 713320
Abstract:
Separate power island for high performance processor. A multi-processor design is presented in which each of the processors is implemented in separately powered portions of a circuitry (e. g. , an integrated circuit). One of the processors can be a main application processor, and another of the processors can be a baseband processor. In addition, the each of the processors can be implemented using different types of circuitry (e. g. , one of the processors [such as the main application processor] is implemented using higher performance/higher leakage circuitry that another of the processors [such as the baseband processor]). One of the processors (e. g. , main application processor) can be powered down when not needed thereby providing energy/power conservation which can be vital is handheld communication device applications such as wireless handheld communication devices.
Radio Frequency Integrated Circuit Having Frequency Dependent Noise Mitigation With Spectrum Spreading
Frederic Christian Marc Hayem - San Diego CA, US Hooman Darabi - Laguna Niguel CA, US Hon Fai (Mike) Chu - Sunnyvale CA, US Anatoly Gelman - San Diego CA, US Kiran Puttegowda - Irvine CA, US Ahmadreza (Reza) Rofougaran - Newport Coast CA, US Maryam Rofougaran - Rancho Palos Verdes CA, US Claude G. Hayek - Huntington Beach CA, US Nelson R. Sollenberger - Farmingdale NJ, US Ronish Patel - East Windsor NJ, US
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
H03K 9/00 H04L 27/00
US Classification:
375316
Abstract:
A plurality of baseband clock signals by detecting an interference condition associated with at least one of the plurality of baseband clock signals and by spreading the spectrum of the at least one of the plurality of baseband clock signals when the interference condition is detected.
Radio Frequency Integrated Circuit Having Frequency Dependent Noise Mitigation With Spectrum Spreading
Frederic Christian Marc Hayem - San Diego CA, US Hooman Darabi - Irvine CA, US Anatoly Gelman - San Diego CA, US Kiran Puttegowda - Irvine CA, US Ahmadreza (Reza) Rofougaran - Newport Coast CA, US Maryam Rofougaran - Rancho Palos Verdes CA, US Claude G. Hayek - Huntington Beach CA, US Nelson R. Sollenberger - Farmingdale NJ, US Ronish Patel - East Windsor NJ, US
International Classification:
H03M 1/00
US Classification:
341126
Abstract:
A radio frequency integrated circuit (RFIC) includes a low noise amplifier that amplifies an inbound radio frequency (RF) signal to produce an amplified RF signal. A down conversion module converts the amplified RF signal to a down converted signal based on a local oscillation. An analog to digital conversion (ADC) module coupled to convert the down converted signal into a digital signal. A baseband processing module converts the digital signal into inbound data, wherein at least one function of the baseband processing module is clocked by a plurality of baseband clock signals A clock module produces the plurality of baseband clock signals, wherein the clock module detects an interference condition when frequency dependent noise components associated with at least one of the plurality of baseband clock signals are inside a frequency band associated with the inbound RF signal, and spreads the spectrum of the at least one of the plurality of baseband clock signals when the interference condition is detected.
Radio Frequency Integrated Circuit Having Frequency Dependent Noise Avoidance
Frederic Christian Marc Hayem - San Diego CA, US Hooman Darabi - Irvine CA, US Anatoly Gelman - San Diego CA, US Kiran Puttegowda - Irvine CA, US Claude G. Hayek - Huntington Beach CA, US Ahmadreza (Reza) Rofougaran - Newport Coast CA, US Maryam Rofougaran - Rancho Palos Verdes CA, US Nelson R. Sollenberger - Farmingdale NJ, US Ronish Patel - East Windsor NJ, US
International Classification:
H04L 27/00
US Classification:
375216
Abstract:
A radio frequency integrated circuit (RFIC) includes a low noise amplifier amplifies an inbound radio frequency (RF) signal to produce an amplified RF signal. A down conversion module converts the amplified RF signal to a down converted signal based on a local oscillation. An analog to digital conversion (ADC) module converts the down converted signal into a digital signal. A baseband processing module converts the digital signal into inbound data, wherein at least one function of the baseband processing module is clocked by a plurality of baseband clock signals. A clock module produces the plurality of baseband clock signals, wherein a rate of each of the plurality of baseband clock signals is set such that frequency dependent noise components associated with each of the plurality of baseband clock signals are outside a frequency band associated with the inbound RF signal.
Separate Power Island For High Performance Processor That Reboots To Second Boot Sector
Anatoly Gelman - San Diego CA, US Kiran Puttegowda - Irvine CA, US
Assignee:
BROADCOM CORPORATION - IRVINE CA
International Classification:
G06F 15/177
US Classification:
713 2
Abstract:
Separate power island for high performance processor. A multi-processor design is presented in which each of the processors is implemented in separately powered portions of a circuitry (e.g., an integrated circuit). One of the processors can be a main application processor, and another of the processors can be a baseband processor. In addition, the each of the processors can be implemented using different types of circuitry (e.g., one of the processors [such as the main application processor] is implemented using higher performance/higher leakage circuitry that another of the processors [such as the baseband processor]). One of the processors (e.g., main application processor) can be powered down when not needed thereby providing energy/power conservation which can be vital is handheld communication device applications such as wireless handheld communication devices.
Inphi Corporation
Director of Engineering
Broadcom 2006 - 2012
Principal Design Engineer
Qualcomm 2003 - 2006
Asic Design Engineer
Adaptive Genomics 2001 - 2002
Co-Founder and Lead Scientist
Ibm 1999 - 2000
Asic Design Engineer
Education:
National Institute of Technology Karnataka
Bachelor of Engineering, Bachelors, Electronics, Communications
Virginia Tech
Master of Science, Masters
Skills:
Asic Verilog Soc Rtl Design Static Timing Analysis Vlsi Timing Closure Ic Debugging Low Power Design Primetime Vhdl Systemverilog Semiconductors Dft Physical Design Embedded Systems Application Specific Integrated Circuits System on A Chip Integrated Circuits
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