Omer L Wehunt

US Patent:

59304871, Jul 27, 1999

Filed:

Mar 6, 1996

Appl. No.:

8/611784

Inventors:

Franklyn H. Story - Chandler AZ
Omer L. Wehunt - Phoenix AZ

Assignee:

VLSI Technology, Inc. - San Jose CA

International Classification:

G06F 1336

US Classification:

395300

Abstract:

A PCI bus master supporting cascading PCI arbitration. The cascading arbitration allows another PCI initiator on the same bus to share the request and grant signal pair to/from the PCI central arbiter. This allows two PCI devices to appear as a single source to the PCI central arbiter. When a request and grant signal pair are cascaded, they are connected to a subordinate arbiter contained within the cascading bus master. The subordinate arbiter is connected to an internal request and grant signal pair from the cascading bus master, and to an external request and grant signal pair from the cascaded device. The cascading PCI bus master then arbitrates between its internal request and the external cascaded device request and issues the resulting request to the central PCI arbiter. When the grant signal from the central arbiter is returned, the cascading bus master routes it to the appropriate internal or external device. Thereby, bus master support signals can be expanded without having to add a costly bridge.

US Patent:

60407883, Mar 21, 2000

Filed:

Jan 21, 1998

Appl. No.:

9/010217

Inventors:

Peter Chambers - Phoenix AZ
Omer Lem Wehunt - Phoenix AZ

Assignee:

VLSI Technology, Inc. - San Jose CA

International Classification:

H03M 1100

US Classification:

341 26

Abstract:

The present invention comprises a cache based scan matrix keyboard controller system. The cache based scan matrix keyboard controller system includes a plurality of keys on a keyboard adapted to signal when a key is activated. The cache based scan matrix keyboard controller system also includes a cache memory component and a state machine. The cache memory component stores information regarding the keys for a period of time. The state machine is adapted to interpret the information in the cache memory component to efficiently control said keyboard in a manner that minimizes reliance on CPU processing and reduces expenditure of design, manufacturing and operating resources.

US Patent:

41544005, May 15, 1979

Filed:

Mar 6, 1978

Appl. No.:

5/883533

Inventors:

Omer L. Wehunt - Phoenix AZ

International Classification:

B05B 1506

US Classification:

239282

Abstract:

A collar, slidably carried upon the barrel of a wand-type spray gun, is normally urged rearward against a stop by a compression spring. Disposed between the stop and the collar is a ring-like member which rocks relative the barrel using the edge of the collar as a fulcrum. The ring-like member abuts a lip extending radially inward from the forward end of a holder tube and prevents expulsion of the spray gun in response to the rearward force from the emission of high pressure fluid from the nozzle of the spray gun. Slight pressure upon the handle readily withdraws the spray gun from the holder and tapered fins carried by the collar. A ramp depending from the lip guides the spray gun into the holder.

US Patent:

58965505, Apr 20, 1999

Filed:

Apr 3, 1997

Appl. No.:

8/825661

Inventors:

Omer Lem Wehunt - Phoenix AZ
Jeffrey M. Lavin - Longmont CO

Assignee:

VLSI Technology, Inc. - San Jose CA

International Classification:

G06F 1300
G06F 1116

US Classification:

395846

Abstract:

Versatility of access to a register set within a direct memory access (DMA) controller is increased. The DMA controller controls direct memory access transfers to and from a main memory. When a first control field in a configuration register has a first value, normal operating access is provided to a register set within the DMA controller. The register set provides control and status of the direct memory access transfers to and from the main memory. When the first control field in the configuration register has a second value special access is provided to the register set. The special access allows storage and restoration of a state of a DMA transfer.