Simonjit R Dutta

US Patent:

20210141723, May 13, 2021

Filed:

Jan 24, 2021

Appl. No.:

17/156593

Inventors:

Han B. Lee - Sammamish WA, US
Simonjit Dutta - Seattle WA, US
Rodolfo G. Esteves Jaramillo - Sammamish WA, US
Poornima S. Kumar - Bellevue WA, US
Chanchala Roy Lairikyengbam - Redmond WA, US
Weilin Wang - Redmond WA, US

International Classification:

G06F 12/02
G06F 9/54

Abstract:

Live objects in heap memory exceeding a threshold size and that have not been recently accessed are compressed or offloaded to secondary memory or storage. Compressing or offloading an object can further be based on how old the object is, which can be determined based on how many garbage collections the object has survived. Objects comprising references to other objects can be split into two sub-objects, one containing value fields that is compressed or offloaded and one containing reference fields that remains uncompressed in heap memory. Heap memory can undergo compaction after objects are compressed or offloaded. Compression accelerators can be used for compression and the decision of whether to compress or offload an object can be based on accelerator throughput, latency, availability, as well as other computing system metrics or characteristics. The compressing and offloading of objects and subsequent compaction can make more heap memory available for object allocation.

US Patent:

20190095229, Mar 28, 2019

Filed:

Sep 22, 2017

Appl. No.:

15/713301

Inventors:

- Santa Clara CA, US
SIMONJIT DUTTA - Sammamish WA, US
HAN LEE - Sammamish WA, US
YIPENG WANG - Hillsboro OR, US

International Classification:

G06F 9/455
G06F 9/45

Abstract:

Methods, apparatus, systems, and articles of manufacture to facilitate field-programmable gate array support during runtime execution of computer readable instructions are disclosed herein. An example apparatus includes a compiler to, prior to runtime, compile a block of code written as high level source code into a first hardware bitstream kernel and a second hardware bitstream kernel; a kernel selector to select the first hardware bitstream kernel based on an attribute to be dispatched during runtime; a dispatcher to dispatch the first hardware bitstream kernel to a field programmable gate array (FPGA) during runtime; and the kernel selector to, when an FPGA attribute does not satisfy a threshold during runtime, adjust the selection of the first hardware bitstream kernel to the second hardware bitstream kernel to be dispatched during runtime.