Todd Martin

US Patent:

20190371041, Dec 5, 2019

Filed:

May 30, 2018

Appl. No.:

15/992239

Inventors:

- Santa Clara CA, US
Richard A. Burns - Boxborough MA, US
Todd Martin - Orlando FL, US
Gianpaolo Tommasi - Santa Clara CA, US

Assignee:

Advanced Micro Devices, Inc. - Santa Clara CA

International Classification:

G06T 15/00
G06T 1/60

Abstract:

Techniques for improving memory utilization for communication between stages of a graphics processing pipeline are disclosed. The techniques include analyzing output instructions of a first shader program to determine whether any such output instructions output some data that is not used by a second shader program. The compiler performs data packing if gaps exist between used output data to reduce memory footprint. The compiler generates optimized output instructions in the first shader program and optimized input instructions in the second shader program to output the used data from the first shader program and input that data in the second shader program in a packed format based on information about usage of output data and data packing. If needed, the compiler inserts instructions to perform runtime checking to identify unused output data of the first shader program based on information not known at compile-time.

Author:

Todd Martin

ISBN #:

0195415248

Author:

Todd Martin

ISBN #:

0802409938