Viorel A Marinescu

US Patent:

8648417, Feb 11, 2014

Filed:

Oct 1, 2012

Appl. No.:

13/632617

Inventors:

Marian Udrea-Spenea - Campbell CA, US
Viorel Alexandru Marinescu - San Jose CA, US

Assignee:

O2Micor, Inc. - Santa Clara CA

International Classification:

H01L 29/66

US Classification:

257343, 257336, 257339, 257344

Abstract:

A laterally-diffused metal-oxide-semiconductor (LDMOS) transistor includes a first well of a first conductivity type, a source of a second conductivity type formed in the first well, a drift region of the second conductivity type formed in the first well, and a second well of the second conductivity type formed in the first well and below the drift region. The drift region is separated from the source. The LDMOS transistor further includes a drain of the second conductivity type formed in the drift region, and includes a concentrator of the second conductivity type formed in the drift region and separated from the drain. A distance between the concentrator and the source is less than a distance between the drain and the source.

US Patent:

20040227215, Nov 18, 2004

Filed:

Jul 22, 2003

Appl. No.:

10/624295

Inventors:

Marian Spenea - San Jose CA, US
Constantin Bucur - Santa Clara CA, US
Marian Niculae - San Jose CA, US
George Simion - San Jose CA, US
Viorel Marinescu - San Jose CA, US

International Classification:

H01L023/58

US Classification:

257/665000

Abstract:

A trimming locking circuit is provided for IC using a programmable fuse array for after-assembly trimming procedures. In one embodiment, a trimming locking circuit is provided for a single power supply input into the programmable fuse array. In another embodiment, a trimming locking circuit is provided to operate with two or more power supply inputs. The trimming locking circuit electrically isolates the programmable fuse array from over voltage conditions on the power supplies.

US Patent:

20140217613, Aug 7, 2014

Filed:

Feb 1, 2013

Appl. No.:

13/757183

Inventors:

- Santa Clara CA, US
Viorel Alexandru MARINESCU - San Jose CA, US
Yu Hsien CHUANG - Zhubei City, TW

Assignee:

O2MICRO INC. - Santa Clara CA

International Classification:

H01L 23/28
H01L 21/56

US Classification:

257777, 438109

Abstract:

An integrated device includes a die attach pad, a main die, a stacked die, and a mold compound. The main die has a first (e.g., bottom) surface attached to the die attach pad and has a second (e.g., top) surface. The stacked die is attached to the second surface of the main die using, for example, an adhesive film. The main die and the stacked die include silicon crystal. The mold compound encapsulates the die attach pad, the main die, and the stacked die.