Xiaoyong Yi from Pittsburg, CA, age 54

Method And Apparatus For Fast Check And Update Of Anti-Replay Window Without Bit-Shifting In Internet Protocol Security
view source
US Patent:

20120272309, Oct 25, 2012
Filed:

Apr 19, 2011
Appl. No.:

13/089735
Inventors:

Xiangyang Zhang - San Jose CA, US
Xiaoyong Yi - Fremont CA, US
Assignee:

FUTUREWEI TECHNOLOGIES, INC. - Plano TX
International Classification:

H04L 9/00
H04L 12/56
US Classification:

726 13, 370394
Abstract:

An apparatus comprising a processor configured to implement an anti-replay check for a plurality of received packets and a plurality of corresponding sequence numbers; and a circular buffer coupled to the processor and comprising a bitmap, wherein the bitmap is slided in a circular manner by updating a low index that points to a first sequence number for a first received packet and a high index that points to a last sequence number for a last received packet without bit-shifting, and wherein, when the update results in the new value of one of the low index and the high index exceeding the end of the circular buffer, the one of the low index and the high index wraps around from the beginning of the circular buffer.

Enhancing Ipsec Performance And Security Against Eavesdropping
view source
US Patent:

20130263249, Oct 3, 2013
Filed:

Mar 28, 2013
Appl. No.:

13/852736
Inventors:

Xiaoyong Yi - Fremont CA, US
Xiangyang Zhang - San Jose CA, US
Assignee:

Futurewei Technologies, Inc. - Plano TX
International Classification:

H04L 29/06
US Classification:

726 14
Abstract:

A network element (NE) comprising a memory device configured to store instructions, and a processor configured to execute the instructions by dividing a first plurality of data packets of a data flow into a first plurality of sub-flows, and causing the first plurality of sub-flows to be transmitted to a second NE via a network, wherein the first plurality of sub-flows are transmitted using a first Internet Protocol Security (IPsec) security association (SA) cluster comprising a plurality of parallel sub-SAs. The disclosure also includes a NE comprising a processor configured to create an IPsec SA cluster comprising a first plurality of sub-SAs between the NE and a second NE using an internet key exchange (IKE) or an IKEv2, wherein the first sub-SAs are unidirectional, and wherein the first sub-SAs are configured to transport a first plurality of data packets in a common direction.

Method And Apparatus For Fast Check And Update Of Anti-Replay Window Without Bit-Shifting In Internet Protocol Security
view source
US Patent:

20130269022, Oct 10, 2013
Filed:

May 28, 2013
Appl. No.:

13/903069
Inventors:

Xiaoyong Yi - Fremont CA, US
International Classification:

H04L 29/06
US Classification:

726 13
Abstract:

An apparatus comprising a processor configured to implement an anti-replay check for a plurality of received packets and a plurality of corresponding sequence numbers; and a circular buffer coupled to the processor and comprising a bitmap, wherein the bitmap is slided in a circular manner by updating a low index that points to a first sequence number for a first received packet and a high index that points to a last sequence number for a last received packet without bit-shifting, and wherein, when the update results in the new value of one of the low index and the high index exceeding the end of the circular buffer, the one of the low index and the high index wraps around from the beginning of the circular buffer.

Xiaoyong Yi