Gang Zhang

Address:

1178 Ashcroft Way, Sunnyvale, CA 94087

VIN:

JM3TB2MV2A0237333

Make:

MAZDA

Model:

CX-9

Year:

2010

US Patent:

7567891, Jul 28, 2009

Filed:

Sep 27, 2001

Appl. No.:

09/969185

Inventors:

Zhihong Liu - Cupertino CA, US
Lifeng Wu - Fremont CA, US
Jeong Y. Choi - Palo Alto CA, US
Ping Chen - San Jose CA, US
Alvin I. Chen - San Jose CA, US
Gang Zhang - Campbell CA, US

Assignee:

Cadence Design Systems, Inc. - San Jose CA

International Classification:

G06F 7/60
G06F 17/50
G06F 9/45
G01R 15/00
G01R 27/28
G01R 27/26
H03K 19/20
H03K 19/094

US Classification:

703 13, 703 2, 703 14, 716 4, 716 5, 324678, 326117, 326120, 326124, 702 57, 702117

Abstract:

The present invention is directed to a number of improvements in methods for hot-carrier device degradation modeling and extraction. Several improvements are presented for the improvement of building device degradation models, including allowing the user to select a device parameter used to build the device degradation model independent of the device parameter selected. The user can also select the functional relation between stress time and degradation level. To further improve accuracy, multiple acceleration parameters can be used to account for different regions of the degradation process. Analytical functions may be used to represent aged device model parameters, either directly or by fitting measured device parameters versus device age values, allowing devices with different age values to share the same device model. The concept of binning is extended to include device degradation. In addition to a binning based on device width and length, age is added.

US Patent:

7878385, Feb 1, 2011

Filed:

Oct 30, 2007

Appl. No.:

11/929539

Inventors:

Ananda H. Kumar - Fremont CA, US
Ezekiel J. J. Kruglick - San Diego CA, US
Adam L. Cohen - Los Angeles CA, US
Kieun Kim - Pasadena CA, US
Gang Zhang - Monterey Park CA, US
Richard T. Chen - Burbank CA, US
Christopher A. Bang - San Diego CA, US
Vacit Arat - La Canada Flintridge CA, US
Michael S. Lockard - Lake Elizabeth CA, US
Uri Frodis - Los Angeles CA, US
Pavel B. Lembrikov - Santa Monica CA, US
Jeffrey A. Thompson - Los Angeles CA, US

Assignee:

Microfabrica Inc. - Van Nuys CA

International Classification:

B23K 31/02

US Classification:

22818022, 228215

Abstract:

Embodiments of invention are directed to the formation of microprobes (i. e. compliant electrical or electronic contact elements) on a temporary substrate, dicing individual probe arrays, and then transferring the arrays to space transformers or other permanent substrates. Some embodiments of the invention transfer probes to permanent substrates prior to separating the probes from a temporary substrate on which the probes were formed while other embodiments do the opposite. Some embodiments, remove sacrificial material prior to transfer while other embodiments remove sacrificial material after transfer. Some embodiments are directed to the bonding of first and second electric components together using one or more solder bumps with enhanced aspect ratios (i. e. height to width ratios) obtained as a result of surrounding the bumps at least in part with rings of a retention material. The retention material may act be a solder mask material.

US Patent:

8396894, Mar 12, 2013

Filed:

Nov 5, 2010

Appl. No.:

12/940986

Inventors:

Eric Jacobson - San Jose CA, US
Les Thomas - Los Gatos CA, US
Gang Zhang - Fremont CA, US

Assignee:

Apple Inc. - Cupertino CA

International Classification:

G06F 17/30

US Classification:

707793

Abstract:

Methods, program products, and systems implementing integrated repository of structured and unstructured data are disclosed. An integrated environment is provided for accessing, structured data (e. g. , data of a relational database) and unstructured data (e. g. , data stored in a text or binary file), including creating, managing, modifying, and searching the structured data and unstructured data. The integrated environment can include an integrated user interface, a set of commands and application programming interface (API), and storage for a relational database and a document repository. The integrated environment can include a database abstraction layer that allows database operations on both the structured data and the unstructured data.

US Patent:

8442982, May 14, 2013

Filed:

Nov 5, 2010

Appl. No.:

12/941026

Inventors:

Eric Jacobson - San Jose CA, US
Les Thomas - Los Gatos CA, US
Gang Zhang - Fremont CA, US

Assignee:

Apple Inc. - Cupertino CA

International Classification:

G06F 17/30

US Classification:

707741, 707711, 707713, 707722, 707765

Abstract:

Methods, program products, and systems implementing integrated repository of structured and unstructured data are disclosed. An integrated environment is provided for accessing structured data (e. g. , data of a relational database) and unstructured data (e. g. , data stored in a text or binary file), including creating, managing, modifying, and searching the structured data and unstructured data. The integrated environment can include an integrated user interface, a set of commands and application programming interface (API), and storage for a relational database and a document repository. The integrated environment can include a database abstraction layer that allows database operations on both the structured data and the unstructured data.

US Patent:

8044723, Oct 25, 2011

Filed:

Oct 8, 2007

Appl. No.:

11/868824

Inventors:

Hong Sun Kim - San Jose CA, US
Jin Wook Kim - San Jose CA, US
Gang Zhang - San Diego CA, US
Jeremy Darren Dunworth - San Diego CA, US
Timothy Paul Pals - San Diego CA, US

Assignee:

QUALCOMM Incorporated - San Diego CA

International Classification:

H03L 7/107

US Classification:

331 17, 331185, 327156, 455 76

Abstract:

Techniques for generating oscillator signals in a wireless communication device are described. A phase-locked loop (PLL) may be used to generate an oscillator signal for a selected frequency channel. Different PLL settings may be used for the blocks in the PLL for different frequency channels. The different PLL settings may be for different PLL loop bandwidths, different amounts of charge pump current, different frequency equations associated with different sets of high and low divider ratios, different frequency division schemes associated with different prescaler ratios and/or different integer divider ratios, high side or low side injection for a super-heterodyne receiver or transmitter, and/or different supply voltages for one or more circuit blocks such as an oscillator. A suitable set of PLL settings may be selected for each frequency channel such that adverse impact due to spurs can be mitigated.

US Patent:

20050142739, Jun 30, 2005

Filed:

Jan 3, 2005

Appl. No.:

11/028958

Inventors:

Ananda Kumar - Fremont CA, US
Ezekiel Kruglick - San Diego CA, US
Adam Cohen - Los Angeles CA, US
Kieun Kim - Pasadena CA, US
Gang Zhang - Monterey Park CA, US

International Classification:

H01L021/8242

US Classification:

438254000

Abstract:

Embodiments of invention are directed to the formation of microprobes (i.e. compliant electrical or electronic contact elements) on a temporary substrate, dicing individual probe arrays, and then transferring the arrays to space transformers or other permanent substrates.

US Patent:

20060108678, May 25, 2006

Filed:

Jun 30, 2005

Appl. No.:

11/173241

Inventors:

Ananda Kumar - Fremont CA, US
Ezekiel Kruglick - San Diego CA, US
Adam Cohen - Los Angeles CA, US
Kieun Kim - Pasadena CA, US
Gang Zhang - Monterey Park CA, US
Richard Chen - Burbank CA, US
Christopher Bang - San Diego CA, US
Vacit Arat - La Canada Flintridge CA, US
Michael Lockard - Lake Elizabeth CA, US
Uri Frodis - Los Angeles CA, US
Pavel Lembrikov - Santa Monica CA, US
Jeffrey Thompson - Los Angeles CA, US

International Classification:

H01L 23/48

US Classification:

257690000

Abstract:

Embodiments of invention are directed to the formation of microprobes (i.e. compliant electrical or electronic contact elements) on a temporary substrate, dicing individual probe arrays, and then transferring the arrays to space transformers or other permanent substrates. Some embodiments of the invention transfer probes to permanent substrates prior to separating the probes from a temporary substrate on which the probes were formed while other embodiments do the opposite. Some embodiments, remove sacrificial material prior to transfer while other embodiments remove sacrificial material after transfer. Some embodiments are directed to the bonding of first and second electric components together using one or more solder bumps with enhanced aspect ratios (i.e. height to width ratios) obtained as a result of surrounding the bumps at least in part with rings of a retention material. The retention material may act be a solder mask material.

US Patent:

20080105355, May 8, 2008

Filed:

Oct 30, 2007

Appl. No.:

11/929597

Inventors:

Ananda Kumar - Fremont CA, US
Ezekiel Kruglick - San Diego CA, US
Adam Cohen - Los Angeles CA, US
Kieun Kim - Pasadena CA, US
Gang Zhang - Monterey Park CA, US
Richard Chen - Burbank CA, US
Christopher Bang - San Diego CA, US
Vacit Arat - La Canada Flintridge CA, US
Michael Lockard - Lake Elizabeth CA, US
Uri Frodis - Los Angeles CA, US
Pavel Lembrikov - Santa Monica CA, US
Jeffrey Thompson - Los Angeles CA, US

International Classification:

B32B 37/00
B23K 31/02

US Classification:

156060000, 228180220, 029592100

Abstract:

Embodiments of invention are directed to the formation of microprobes (i.e. compliant electrical or electronic contact elements) on a temporary substrate, dicing individual probe arrays, and then transferring the arrays to space transformers or other permanent substrates. Some embodiments of the invention transfer probes to permanent substrates prior to separating the probes from a temporary substrate on which the probes were formed while other embodiments do the opposite. Some embodiments, remove sacrificial material prior to transfer while other embodiments remove sacrificial material after transfer. Some embodiments are directed to the bonding of first and second electric components together using one or more solder bumps with enhanced aspect ratios (i.e. height to width ratios) obtained as a result of surrounding the bumps at least in part with rings of a retention material. The retention material may act be a solder mask material.