Intel Corporation
Emulation Execution and Automation Global Lead
Intel Corporation Nov 2011 - Dec 2014
Debug Tools Validation Engineer
Intel Corporation Jun 2006 - Oct 2011
System Validation Engineer
Intel Corporation Aug 2004 - May 2006
Emulation Engineer
University of Tennessee Department of Recreational Sports May 2003 - Jun 2004
It Graduate Assistant
Education:
University of Tennessee 2000 - 2004
Master of Science, Masters
University of Madras 1996 - 2000
Bachelor of Engineering, Bachelors, Electronics Engineering
Skills:
Post Silicon Debugging Logic Analyzer Rtl Verification Dfd Dfv Computer Architecture Asic Soc Verilog Vlsi Semiconductors Systemverilog Ic Processors Perl Python Validation System on A Chip Emulation
Interests:
International Politics Carnatic Mandolin Classical Guitar Theology